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SCANNING PROBE LITHOGRAPHY
SCANNING PROBE LITHOGRAPHY / Hyongsok T.Soh, Kathryn Wilder Guarini, Calvin F.Quate 공저.
SCANNING PROBE LITHOGRAPHY

Detailed Information

자료유형  
 단행본
ISBN  
0-7923-7361-8
UDC  
53.082.7
DDC  
681.2 H997s-23
청구기호  
681.2 H997s
저자명  
F.Quate, Hyongsok T.Soh, Kathryn Wilder Guarini, Calvin
서명/저자  
SCANNING PROBE LITHOGRAPHY / Hyongsok T.Soh, Kathryn Wilder Guarini, Calvin F.Quate 공저.
발행사항  
미국 : Kluwer Academic Pub., 2001
형태사항  
195p. ; 25cm
내용주기  
완전내용Chapter 1 : Introduction to Scanning Prbe Lithography부분내용1완전내용1.1 The Scanning Probe Microscope부분내용1완전내용1.2 High-Resolution Patterning Using Scanning Probes부분내용6완전내용1.3 Semiconductor Lithography부분내용9완전내용1.4 Book Overview부분내용15완전내용1.5 References부분내용16완전내용Chapter : 2 SPL by Electric-Field-Enhanced Oxidation부분내용23완전내용2.1 Field-Enhanced Oxidation of Silicon부분내용23완전내용2.2 Amorphous Silicon as a Resist Material부분내용24완전내용2.3 Fabrication of a 100 nm nMOSFET부분내용2600완전내용2.4 Results and Discussion부분내용3211완전내용2.5 Referecnes부분내용1622완전내용Chapter 3 : Resist Exposure Using Field-Emitted Electrons부분내용3733완전내용3.1 Field-Emitted Electron Exposure부분내용3744완전내용3.2 Current-Controlled Exposures in Contact Mode부분내용4855완전내용3.3 Current-Controlled Exposures in Noncontact Mode부분내용6066완전내용3.4 Simulations of Electron Field Emission and Electron Trajectories부분내용6777완전내용3.5 Referenecs부분내용7788완전내용Chapter 4 : SPL Linewidth Control부분내용8199완전내용4.1 Exposure Tools and Samples부분내용8100완전내용4.2 Sensitivity and Exposure Latitude부분내용8411완전내용4.3 Energy Density Distribution in the Resist부분내용8522완전내용4.4 Patterning Linearity Using a Pixel Writing Scheme부분내용8833완전내용4.5 Proximity Effects부분내용9144완전내용4.6 Exposure Mechanisms of High- and Low-nergy Electrons부분내용9755완전내용4.7 Summary부분내용9966완전내용4.8 References부분내용9977완전내용Chapter 5 : Critical Dimension Pattenrning Using SPL부분내용10388완전내용5.1 100 nm pMOSFET Device Fabrication부분내용10399완전내용5.2 Gate Level Lithography Using SPL부분내용10500완전내용5.3 PMOSET Divice Characteristics부분내용11011완전내용5.4 Summary of "Mix and Match" Lithpgraphy부분내용11222완전내용5.5 References부분내용11233완전내용Chapter 6 : High Speed Resist Exposure With a Single Tip부분내용11544완전내용6.1 High Speed Patterning of Siloxane SOG부분내용11555완전내용6.2 Curent-Controlled SPL at High Speeds부분내용11966완전내용6.3 References부분내용12977완전내용Chapter 7 : On-Chip Lithography Control부분내용13188완전내용7.1 Background and Motivation부분내용13199완전내용7.2 MOSFET Design Considerations부분내용13200완전내용7.3 Cantilever and Ti Design Parameters부분내용13811완전내용7.4 Fabrication Process부분내용14022완전내용7.5 Device Characteristics부분내용14633완전내용7.6 Lithgraphy with Integrated Transistor for Exposure Dose Control부분내용14844완전내용7.7 Summary부분내용15055완전내용7.8 References부분내용15166완전내용Chapter 8 : Scanning Prove Tips for SPL부분내용15377완전내용8.1 Silicon and Metal-Coated Tips부분내용15388완전내용8.2 Post-Processed Silicon Tips부분내용15599완전내용8.3 Carbon Nanotubes as Scanning Probe Tips부분내용15600완전내용8.4 References부분내용16011완전내용Chapter 9 : Scanning Probe arrays for Lithpgraphy부분내용16322완전내용9.1 Current-Controlled Lithography With Two Tips부분내용16333완전내용9.2 Massively Parallel Arrays for Lithgraphy부분내용16344완전내용9.3 Integrated Current Control for Arrays부분내용17255완전내용9.4 Two Dimensional Arrays : Process Development부분내용17366완전내용9.5 Two Dimensional Arrays : Integration부분내용17877완전내용9.6 Imaging With the 2D Array부분내용18788완전내용9.7 References부분내용18899완전내용Epilog부분내용19100완전내용List of Publications부분내용19311완전내용Index부분내용19722
가격  
₩139310
Control Number  
gtec:8287

MARC

 008021021s2001        us                        000a    eng
■020    ▼a0-7923-7361-8
■0801  ▼a53.082.7
■082    ▼a681.2▼bH997s▼223
■090    ▼a681.2▼bH997s
■1000  ▼aF.Quate,  Hyongsok  T.Soh,  Kathryn  Wilder  Guarini,  Calvin
■24510▼aSCANNING  PROBE  LITHOGRAPHY▼dHyongsok  T.Soh,  Kathryn  Wilder  Guarini,  Calvin  F.Quate  공저.
■260    ▼a미국▼bKluwer  Academic  Pub.▼c2001
■300    ▼a195p.▼c25cm
■505    ▼aChapter  1  :  Introduction  to  Scanning  Prbe  Lithography▼c1▼a1.1  The  Scanning  Probe  Microscope▼c1▼a1.2  High-Resolution  Patterning  Using  Scanning  Probes▼c6▼a1.3  Semiconductor  Lithography▼c9▼a1.4  Book  Overview▼c15▼a1.5  References▼c16▼aChapter  :  2  SPL  by  Electric-Field-Enhanced  Oxidation▼c23▼a2.1  Field-Enhanced  Oxidation  of  Silicon▼c23▼a2.2  Amorphous  Silicon  as  a  Resist  Material▼c24▼a2.3  Fabrication  of  a  100  nm  nMOSFET▼c2600▼a2.4  Results  and  Discussion▼c3211▼a2.5  Referecnes▼c1622▼aChapter  3  :  Resist  Exposure  Using  Field-Emitted  Electrons▼c3733▼a3.1  Field-Emitted  Electron  Exposure▼c3744▼a3.2  Current-Controlled  Exposures  in  Contact  Mode▼c4855▼a3.3  Current-Controlled  Exposures  in  Noncontact  Mode▼c6066▼a3.4  Simulations  of  Electron  Field  Emission  and  Electron  Trajectories▼c6777▼a3.5  Referenecs▼c7788▼aChapter  4  :  SPL  Linewidth  Control▼c8199▼a4.1  Exposure  Tools  and  Samples▼c8100▼a4.2  Sensitivity  and  Exposure  Latitude▼c8411▼a4.3  Energy  Density  Distribution  in  the  Resist▼c8522▼a4.4  Patterning  Linearity  Using  a  Pixel  Writing  Scheme▼c8833▼a4.5  Proximity  Effects▼c9144▼a4.6  Exposure  Mechanisms  of  High-  and  Low-nergy  Electrons▼c9755▼a4.7  Summary▼c9966▼a4.8  References▼c9977▼aChapter  5  :  Critical  Dimension  Pattenrning  Using  SPL▼c10388▼a5.1  100  nm  pMOSFET  Device    Fabrication▼c10399▼a5.2  Gate  Level  Lithography  Using  SPL▼c10500▼a5.3  PMOSET  Divice  Characteristics▼c11011▼a5.4  Summary  of  "Mix  and  Match"  Lithpgraphy▼c11222▼a5.5  References▼c11233▼aChapter  6  :  High  Speed  Resist  Exposure  With  a  Single  Tip▼c11544▼a6.1  High  Speed  Patterning  of  Siloxane  SOG▼c11555▼a6.2  Curent-Controlled  SPL  at  High  Speeds▼c11966▼a6.3  References▼c12977▼aChapter  7  :  On-Chip  Lithography  Control▼c13188▼a7.1  Background  and  Motivation▼c13199▼a7.2  MOSFET  Design  Considerations▼c13200▼a7.3  Cantilever  and  Ti  Design  Parameters▼c13811▼a7.4  Fabrication  Process▼c14022▼a7.5  Device  Characteristics▼c14633▼a7.6  Lithgraphy  with  Integrated  Transistor  for  Exposure  Dose  Control▼c14844▼a7.7  Summary▼c15055▼a7.8  References▼c15166▼aChapter  8  :  Scanning  Prove  Tips  for  SPL▼c15377▼a8.1  Silicon  and  Metal-Coated  Tips▼c15388▼a8.2  Post-Processed  Silicon  Tips▼c15599▼a8.3  Carbon  Nanotubes  as  Scanning  Probe  Tips▼c15600▼a8.4  References▼c16011▼aChapter  9  :  Scanning  Probe  arrays  for  Lithpgraphy▼c16322▼a9.1  Current-Controlled  Lithography  With  Two  Tips▼c16333▼a9.2  Massively  Parallel  Arrays  for  Lithgraphy▼c16344▼a9.3  Integrated  Current  Control  for  Arrays▼c17255▼a9.4  Two  Dimensional  Arrays  :  Process  Development▼c17366▼a9.5  Two  Dimensional  Arrays  :  Integration▼c17877▼a9.6  Imaging  With  the  2D  Array▼c18788▼a9.7  References▼c18899▼aEpilog▼c19100▼aList  of  Publications▼c19311▼aIndex▼c19722
■950    ▼b₩139310

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