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Digital Design Fundamentals
Digital Design Fundamentals / Kenneth J. Breeding 저.
Digital Design Fundamentals

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자료유형  
 단행본
ISBN  
0-13-211277-9
UDC  
621.377
DDC  
621.3815 B832d-23
청구기호  
621.3815 B832d
저자명  
Breeding, Kenneth J.
서명/저자  
Digital Design Fundamentals / Kenneth J. Breeding 저.
발행사항  
미국 : Prentice Hall, 1992
형태사항  
446p. : 삽도 ; 24cm
내용주기  
완전내용1. INTRODUCTION TO DIGITA SYSTEMS부분내용1완전내용1.1 What Is d Digital System?부분내용1완전내용1.2 Why Are Digital Systems so Pervasive?부분내용3완전내용1.3 Organization of the Book부분내용4완전내용2. NUMBER SYSTEMS부분내용7완전내용2.1 Introduction부분내용7완전내용2.2 Base Conversion부분내용8완전내용2.3 Base Conversion부분내용8완전내용2.3 Binary Arithmetic부분내용18완전내용2.5 Goding부분내용2400완전내용Annotated Bibliography부분내용33 .11완전내용Problems부분내용3522완전내용3. BOOLEAN AND SWITCHING ALGEBRA부분내용4133완전내용3.1 Introduction부분내용4144완전내용3.2 The Huntington Postulates부분내용4255완전내용3.3 De Morgan's Theorem부분내용4966완전내용3.4 Switching Functions부분내용5077완전내용3.5 Simplification of Switching Functions부분내용5888완전내용Annotated Bibliography부분내용8699완전내용Problems부분내용8800완전내용4. GATES AND THE DESIGN OF SWITCHING CIRCUITS부분내용9511완전내용4.1 Introduction부분내용9522완전내용4.2 Gate Symbology부분내용9633완전내용4.3 Switching Circuit Design Examples부분내용11244완전내용4.4 Conbinational Logic Design Using ROMs and PLAs부분내용12255완전내용Annotated Bibliography부분내용12866완전내용Problems부분내용13077완전내용5. SEQUENTIAL CIRCUITS부분내용13788완전내용5.1 Introduction부분내용137.99완전내용5.2 Flip-Flops부분내용14300완전내용5.3 Counters부분내용15111완전내용5.4 Synchronous, of Clocked, sequential Circuits부분내용15822완전내용5.5 Simplification of Sequential Circuits부분내용17833완전내용5.6 Mealy-Moore Equivalence and Other Sequential Circuits부분내용18344완전내용Annotated Bibliography부분내용18755완전내용Problems부분내용18866완전내용6. ASYNCHRONOUS SEQUENTIAL CIRCUITS부분내용20177완전내용6.1 Introduction부분내용20188완전내용6.2 Analysis Problem부분내용20399완전내용6.3 Analysis of the 7474 Edge-Triggered D Flip-Flop부분내용21700완전내용6.4 Synthesis of Asynchronous Sequential Circuits부분내용22411완전내용6.5 Methods to Avoid Reaces부분내용23322완전내용6.6 Essential Hazard부분내용23733완전내용6.7 Some Design Examples부분내용23844완전내용6.8 Final Comment부분내용25755완전내용Annotated Bibliography부분내용25766완전내용Problems부분내용25877완전내용7. PULSE-MODE OR MULTIPLY CLOCKED SEQUENTIAL CIRCUITS부분내용26588완전내용7.1 Introduction부분내용26599완전내용7.2 Basic Pulse-Mode Circuit Model부분내용26700완전내용7.3 Analysis Example부분내용27011완전내용7.4 Design Problem부분내용27322완전내용7.5 Additional Design Examples부분내용28133완전내용7.6 Notes on Mixing Level Signals and Pules부분내용28944완전내용Annotated Bibliography부분내용29555완전내용Problems부분내용29566완전내용8. SPECIAL TOPICS IN SWITCHING THEORY부분내용30177완전내용8.1Introduction부분내용30188완전내용8.2 Bilateral Networks부분내용30299완전내용8.3 Threshold Logic부분내용30800완전내용8.4 Functional Decomposition부분내용32311완전내용8.5 Symmetric Functions부분내용33122완전내용8.6 Iterative Networks부분내용34333완전내용Annotated Bibliography부분내용34744완전내용Problems부분내용34955완전내용9. LARGE-SCALE SYSTEM DESIGN부분내용35366완전내용9.1 Introduction부분내용35377완전내용9.2 Registers부분내용35488완전내용9.3 Register Transfer Notation부분내용36599완전내용9.4 Flowcharts and State Diagrams부분내용37200완전내용9.5 Design Process and Some Examples부분내용38711완전내용9.6 Final Comments and Observations부분내용41122완전내용Annotated Bibliography부분내용41133완전내용Problems부분내용41244완전내용A. AN INTRODUCTION TO IEEE Std. 91-1984부분내용41955완전내용A.1 Introduction부분내용41966완전내용A.2 Symbols Used for Gates and Flip-Flops부분내용42077완전내용A.3 Symbols for Medium-to Large-Scale Devices부분내용42588완전내용A.4 Symbols Used to Identify Physical Characteristics부분내용43899완전내용Annotated Bibliography부분내용43900완전내용Index부분내용44111
가격  
₩20000
Control Number  
gtec:8257

MARC

 008021018s1992        us  a                    000a    eng
■020    ▼a0-13-211277-9
■0801  ▼a621.377
■082    ▼a621.3815▼bB832d▼223
■090    ▼a621.3815▼bB832d
■1000  ▼aBreeding,  Kenneth  J.
■24510▼aDigital  Design  Fundamentals▼dKenneth  J.  Breeding  저.
■260    ▼a미국▼bPrentice  Hall▼c1992
■300    ▼a446p.▼b삽도▼c24cm
■505    ▼a1.  INTRODUCTION  TO  DIGITA  SYSTEMS▼c1▼a1.1  What  Is  d  Digital  System?▼c1▼a1.2  Why  Are  Digital  Systems  so  Pervasive?▼c3▼a1.3  Organization  of  the  Book▼c4▼a2.  NUMBER  SYSTEMS▼c7▼a2.1  Introduction▼c7▼a2.2  Base  Conversion▼c8▼a2.3  Base  Conversion▼c8▼a2.3  Binary  Arithmetic▼c18▼a2.5  Goding▼c2400▼aAnnotated  Bibliography▼c33▼d.11▼aProblems▼c3522▼a3.  BOOLEAN  AND  SWITCHING  ALGEBRA▼c4133▼a3.1  Introduction▼c4144▼a3.2  The  Huntington  Postulates▼c4255▼a3.3  De  Morgan's  Theorem▼c4966▼a3.4  Switching  Functions▼c5077▼a3.5  Simplification  of  Switching  Functions▼c5888▼aAnnotated  Bibliography▼c8699▼aProblems▼c8800▼a4.  GATES  AND  THE  DESIGN  OF  SWITCHING  CIRCUITS▼c9511▼a4.1  Introduction▼c9522▼a4.2  Gate  Symbology▼c9633▼a4.3  Switching  Circuit  Design  Examples▼c11244▼a4.4  Conbinational  Logic  Design  Using  ROMs  and  PLAs▼c12255▼aAnnotated  Bibliography▼c12866▼aProblems▼c13077▼a5.  SEQUENTIAL  CIRCUITS▼c13788▼a5.1  Introduction▼c137.99▼a5.2  Flip-Flops▼c14300▼a5.3  Counters▼c15111▼a5.4  Synchronous,  of  Clocked,  sequential  Circuits▼c15822▼a5.5  Simplification  of  Sequential  Circuits▼c17833▼a5.6  Mealy-Moore  Equivalence  and  Other  Sequential  Circuits▼c18344▼aAnnotated  Bibliography▼c18755▼aProblems▼c18866▼a6.  ASYNCHRONOUS  SEQUENTIAL  CIRCUITS▼c20177▼a6.1  Introduction▼c20188▼a6.2  Analysis  Problem▼c20399▼a6.3  Analysis  of  the  7474  Edge-Triggered  D  Flip-Flop▼c21700▼a6.4  Synthesis  of  Asynchronous  Sequential  Circuits▼c22411▼a6.5  Methods  to  Avoid  Reaces▼c23322▼a6.6  Essential  Hazard▼c23733▼a6.7  Some  Design  Examples▼c23844▼a6.8  Final  Comment▼c25755▼aAnnotated  Bibliography▼c25766▼aProblems▼c25877▼a7.  PULSE-MODE  OR  MULTIPLY  CLOCKED  SEQUENTIAL  CIRCUITS▼c26588▼a7.1  Introduction▼c26599▼a7.2  Basic  Pulse-Mode  Circuit  Model▼c26700▼a7.3  Analysis  Example▼c27011▼a7.4  Design  Problem▼c27322▼a7.5  Additional  Design  Examples▼c28133▼a7.6  Notes  on  Mixing  Level  Signals  and  Pules▼c28944▼aAnnotated  Bibliography▼c29555▼aProblems▼c29566▼a8.  SPECIAL  TOPICS  IN  SWITCHING  THEORY▼c30177▼a8.1Introduction▼c30188▼a8.2  Bilateral  Networks▼c30299▼a8.3  Threshold  Logic▼c30800▼a8.4  Functional  Decomposition▼c32311▼a8.5  Symmetric  Functions▼c33122▼a8.6  Iterative  Networks▼c34333▼aAnnotated  Bibliography▼c34744▼aProblems▼c34955▼a9.  LARGE-SCALE  SYSTEM  DESIGN▼c35366▼a9.1  Introduction▼c35377▼a9.2  Registers▼c35488▼a9.3  Register  Transfer  Notation▼c36599▼a9.4  Flowcharts  and  State  Diagrams▼c37200▼a9.5  Design  Process  and  Some  Examples▼c38711▼a9.6  Final  Comments  and  Observations▼c41122▼aAnnotated  Bibliography▼c41133▼aProblems▼c41244▼aA.  AN  INTRODUCTION  TO  IEEE  Std.  91-1984▼c41955▼aA.1  Introduction▼c41966▼aA.2  Symbols  Used  for  Gates  and  Flip-Flops▼c42077▼aA.3  Symbols  for  Medium-to  Large-Scale  Devices▼c42588▼aA.4  Symbols  Used  to  Identify  Physical  Characteristics▼c43899▼aAnnotated  Bibliography▼c43900▼aIndex▼c44111
■950    ▼b₩20000

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