MARC

 008000308s1999        ulka                        0a    kor
■0801  ▼a621.382
■082    ▼a621.395▼b이52ㄷ▼223
■090    ▼a621.395▼b이52ㄷ
■1000  ▼a이상부
■24510▼a디지털  논리회로설계▼d이상부
■260    ▼a서울▼b정일▼c1999
■300    ▼a304p.▼b삽도▼c27cm.
■505    ▼a수의  체계/수의  표현▼c15▼a2진수의4칙  연산▼c25▼a수의  표현▼c36▼a디지털  코드/BCD  코드▼c41▼a오류검사  코드▼c48▼a논리  게이트/AND  게이트▼c55▼a배타적  NOR  게이트▼c59▼a논리  게이트의  성질▼c63▼a부울  대수▼c70▼a부울  대수의  기본  법칙▼c7200▼a부울  대수의  규칙▼c7411▼a드  모르간의  정리▼c7822▼a논리식의  간소화/표준  논리식의  유도▼c8333▼a논리식의  간소화▼c9044▼a카르노  도(Kamaugh  map)▼c9155▼a무관계  조건(don't  care  condition)▼c10566▼a테이블  방법▼c10977▼a조합  논리회로/가산기▼c12188▼a감산기(Subtracter)▼c13299▼a디코더(Decoder)▼c13800▼a인코더(Encoder)▼c16011▼a비교기(Compartor)▼c17122▼a디멀티플렉서(Demultiplexer)▼c17833▼a멀티플렉서(Multiplexer)▼c18044▼a순서  논리회로/플립플롭의  개요▼c19055▼a기본  RS  플립플롭(flip  flop)▼c19566▼a에지  트리거드  RS  플립플롭▼c20077▼a주종  D  플립플롭(Master  Slave  D  flip  flop)▼c21788▼a순서  논리  회로의  분석▼c22299▼a카운터/카운터  설계▼c23000▼a비동기  카운터▼c23411▼a동기  카운터▼c24022▼a레지스터(Register)▼c25133▼a시프트  레지스터(Shift  register)▼c25744▼a양방향  시프트  레지스터▼c26255▼a범용  시프트  레지스터▼c26366▼a직렬  시프트  레지스터  카운터▼c26477▼a메모리/메모리의  개요▼c27188▼a반도체  메모리의  분류▼c27599▼aRAM(Random  access  memory)▼c27800▼aROM▼c28611▼a프로그램  논리  장치▼c29022
■950    ▼b12,000

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