MARC

 008990921s1994        ulka                        0a    kor
■0801  ▼a621.377
■082    ▼a621.3815▼b배34ㄷ▼223
■090    ▼a621.3815▼b배34ㄷ
■1000  ▼a배명진  외역
■24510▼a디지탈  논리  설계  기초▼d배명진  외역
■260    ▼a서울▼b에드텍▼c1994
■300    ▼a915p.▼b삽도▼c27cm.
■505    ▼a개요  및  진법  변환▼c1▼a부울대수학▼c23▼a부울대수(계속)▼c51▼a부울대수식의  간소화▼c77▼a민텀과  맥스텀  전개식▼c97▼a카노  맵(KARNAUGH  MAPS)▼c129▼aQuine-McCluskey방법▼c181▼aNAND  및  NOR  게이트▼c211▼a다중  출력  회로망▼c255▼a멀티플렉서,디코더,ROM,PLA▼c25500▼a조합  회로망  설계▼c30311▼a플립플롭▼c32122▼a카운터  및  유사한  순차  회로망▼c35533▼a클럭된  순차  회로망의  분석▼c38944▼a상태  그래프와  표의  유도▼c42555▼a상태표의  간소화와  상태할당▼c46366▼a시퀀셜  회로망  설계▼c50977▼a반복적  회로망▼c53388▼a시컨셜  회로망  설계▼c55199▼a시퀀셜  회로망  설계▼c57700▼a덧셈과  뺄셈을  위한  회로망▼c60911▼a산술  연산을  위한  회로망▼c63522▼a상태  머쉰(state  machine)  설계▼c66933▼a비동기  시컨셜  회로망의  분석▼c69544▼a원시  흐름표의  유도  및  간소화▼c71755▼a상태할당과  흐름표의  실현▼c73966▼a해  저  드  (Hazards)▼c77377▼a비동기  순차  회로망의  설계▼c80188▼a논리소자와  집적회로  논리  게이트▼c82399
■653    ▼aFundamentals  of  Logic  Design
■950    ▼b20,000

Preview

Export

ChatGPT Discussion

AI Recommended Related Books