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A High-Performance Architecture of the Double-Mode Binary Coder for H.264.AVC
A High-Performance Architecture of the Double-Mode Binary Coder for H.264.AVC
상세정보
- 자료유형
- 기사
- ISSN
- 10518215
- 서명/저자
- A High-Performance Architecture of the Double-Mode Binary Coder for H.264.AVC / Pastuszak, G.
- 형태사항
- pp. 949
- 기타저자
- Pastuszak, G.
- 모체레코드
- 모체정보확인
- Control Number
- gtec:325598
MARC
008170914s2008 a a kor■022 ▼a10518215
■245 ▼aA High-Performance Architecture of the Double-Mode Binary Coder for H.264.AVC▼dPastuszak, G.
■300 ▼app. 949
■7001 ▼aPastuszak, G.
■773 ▼tIEEE transactions on circuits and systems for video technology▼gv.18 n.7▼d2008, 07
■SIS ▼aKS018845▼b63262▼h3▼sG
