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A Five-Stage Pipeline, 204 Cycles/MB, Single-Port SRAM-Based Deblocking Filter for H.264
A Five-Stage Pipeline, 204 Cycles/MB, Single-Port SRAM-Based Deblocking Filter for H.264
Detailed Information
- 자료유형
- 기사
- ISSN
- 10518215
- 서명/저자
- A Five-Stage Pipeline, 204 Cycles/MB, Single-Port SRAM-Based Deblocking Filter for H.264 / Xu, K. ; Choy, C.-S
- 형태사항
- pp. 363
- 기타저자
- Xu, K.
- 기타저자
- Choy, C.-S
- 모체레코드
- 모체정보확인
- Control Number
- gtec:325554
MARC
008170914s2008 a a kor■022 ▼a10518215
■245 ▼aA Five-Stage Pipeline, 204 Cycles/MB, Single-Port SRAM-Based Deblocking Filter for H.264▼dXu, K.▼eChoy, C.-S
■300 ▼app. 363
■7001 ▼aXu, K.
■7001 ▼aChoy, C.-S
■773 ▼tIEEE transactions on circuits and systems for video technology▼gv.18 n.3▼d2008, 03
■SIS ▼aKS018844▼b63262▼h3▼sG
