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(Image/Video Hardware/Software Systems) Architecture Design of the H.264/AVC Encoder Based on Rate-Distortion Optimization
(Image/Video Hardware/Software Systems) Architecture Design of the H.264/AVC Encoder Based on Rate-Distortion Optimization
Detailed Information
- 자료유형
- 기사
- ISSN
- 10518215
- 서명/저자
- (Image/Video Hardware/Software Systems) Architecture Design of the H.264/AVC Encoder Based on Rate-Distortion Optimization / G. Pastuszak
- 형태사항
- pp. 1844
- 기타저자
- G. Pastuszak
- 모체레코드
- 모체정보확인
- Control Number
- gtec:294974
MARC
008151211s2015 a a kor■022 ▼a10518215
■245 ▼a(Image/Video Hardware/Software Systems) Architecture Design of the H.264/AVC Encoder Based on Rate-Distortion Optimization▼dG. Pastuszak
■300 ▼app. 1844
■7001 ▼aG. Pastuszak
■773 ▼tIEEE transactions on circuits and systems for video technology▼gv.25 n.11▼d2015, 11
■SIS ▼aKS031563▼b63262▼h3▼sG
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